1. Field
Example embodiments of the following description relate to a frame rate conversion technology which interpolates a frame using image data of a previous frame and a current frame of an edge and increases a frame refresh rate when dividing and processing an Ultra-High Definition (UD) image.
2. Description of the Related Art
Currently, processing methods for Ultra-High Definition (UD) video are required due to the advent of 1920×1080 full High Definition (HD) digital cinema. However, since a UD image includes a larger amount of data than a full HD video, a clock frequency must be increased or a video must be divided in order to be simultaneously processed.
In an existing Liquid Crystal Display (LCD) panel, shortcomings, due to a low frame refresh rate, such as motion blur or film judder may be aggravated when a screen size is increased.
For example, a pixel clock speed of a full HD video at 60 Frame Per Second (FPS) is approximately 150 MHz, although the pixel clock speed may insignificantly change according to a stream. Also, a pixel clock speed to replay a 4096×2160 4 k digital cinema and a 4× full HD video of 3840×2160 at 60 fps is approximately 150×4 (600) MHz.
However, shortcomings such as heat generation, limit of switching time in a circuit, and the like must be overcome to process a UD image using existing Application Specific Integrated Circuit (ASIC) technology.